招聘职位
Custom Layout Engineer （北京）
- 公 司：NO.16-a top 15 semiconductor company
- 工作地点：北京
- 发布日期：2012-10-12
- 职位编号：2953
- 有效状态：已关闭
职位描述
This position will participate in layout design team for analog and mixed signal circuits on CMOS process. Work through entire chip construction process, from preliminary floorplanning, detailed sub-block layout, and global placement and routing. Responsible for running full verification sequence using advanced EDA tools. The responsibilities will include but not limited to:
1.Layout floorplanning of large, mixed signal IC
2.Transistor level sub-block layout based on schematics provide by designers, including careful analog considerations
3.Completion of DRC and LVS check and verification tools
4.Hold and attend layout reviews
职位要求
1.BSEE or above
2.Have 3+ years working experience as a custom layout
3.Layout design experience in PLL, SerDes or RF circuit
4.Be able to translate circuits schematics directly to layout
5.Good at communication with team members
6.Understand IC process basics
7.Understand circuit basics and how they impact IC layout strategy<br>
8.Good English language skill