招聘职位
DIP Application Engineer
- 公 司：NO.73-One world top EDA company
- 工作地点：上海
- 发布日期：2014-04-30
- 职位编号：3542
- 有效状态：有效
职位描述
Responsibilities:
1) Providing direct technical support to customers in presale stage to persuade customers to adopt Cadence Design IP solutions for their applications
2) Interface with customer architects and Design IP business unit to enable evaluation of application specific IP performance and features per customer’s SOC requirements.
2) Working with the sales team to manage the IP activities in the region to achieve a high customer satisfaction rate and for building strong customer relationships
3) Providing customer feedback on new/existing requirements for Design IP usage from customers to the IP business unit.
4) Providing direct technical customer support and assistance to enable customers to successfully integrate/use Design IP in their SOC.
5) Writing application notes in situation to facilitate customer usage of the IP
职位要求
Position Requirements :
1) Experience in digital/analog design and implementation of controllers/phy
2) Knowledge of serdes and backend implementation is a plus
3) Experience with SOC architecture include on-chip fabric (AMBA/Sonics OCP/Arteris NOC), external interconnect protocols (e.g PCIe/Ethernet) and DRAM memory protocols (DDRn, LPDDRn), DRAM PHYs, .NAND Flash (Async, ONFI, Toggle NAND), eMMC/SD, MIPI
4) Knowing serdes/analog IP is a plus
5) Exposure to IP-based SOC design flow and real tape-out experience.
6) Good written and verbal communication skills and problem solving skills are required.
7) Ability to conduct technical meetings, presentations, seminars and training to customers and to the sales team
8) Travel within AP region may be required.
9) Good understanding of the semiconductor IP marketplace and ecosystem is a plus.