招聘职位
STA Engineer
- 公 司：NO.78-A famous IC company
- 工作地点：上海
- 发布日期：2013-03-11
- 职位编号：3096
- 有效状态：已关闭
职位描述
-8 years experience in Synthesis, STA and Timing closure activities of Full Chip and IPs
Experience in setting up full chip synthesis flow and develop synthesis constraints
Experience in STA and timing closure activities and coming up with STA constraints for the design.
Should be able to setup and own/drive the STA and timing closure activities for the design.
Experience with Synopsis DC & Synopsys Primetime tools and Primetime SI tools is required.
Experience with Cadence RC and ETS is a preferred.
The candidate should have very good knowledge about Architecture, RTL, Netlist and DFT methodology.
Should be able to write simple scripts to process the reports, come up with ECO etc.,
Should understand the whole Physical Design flow and should be able to provide inputs for implementation
Should have timing closure experience for at least 2 full chip SoC designs.
职位要求